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» Architectural Design Recovery using Data Mining Techniques
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DAC
2011
ACM
13 years 9 months ago
Characterizing within-die and die-to-die delay variations introduced by process variations and SOI history effect
Variations in delay caused by within-die and die-to-die process variations and SOI history effect increase timing margins and reduce performance. In order to develop mitigation te...
Jim Aarestad, Charles Lamech, Jim Plusquellic, Dhr...
JCST
2008
140views more  JCST 2008»
14 years 9 months ago
ROPAS: Cross-Layer Cognitive Architecture for Mobile UWB Networks
The allocation of bandwidth to unlicensed users, without significantly increasing the interference on the existing licensed users, is a challenge for Ultra Wideband (UWB) networks....
Chittabrata Ghosh, Bin Xie, Dharma P. Agrawal
COMSWARE
2006
IEEE
15 years 3 months ago
Utilizing network features for privacy violation detection
Privacy, its violations and techniques to circumvent privacy violation have grabbed the centre-stage of both academia and industry in recent months. Corporations worldwide have be...
Jaijit Bhattacharya, Rajanish Dass, Vishal Kapoor,...
NIPS
2008
14 years 11 months ago
Natural Image Denoising with Convolutional Networks
We present an approach to low-level vision that combines two main ideas: the use of convolutional networks as an image processing architecture and an unsupervised learning procedu...
Viren Jain, H. Sebastian Seung
ISCA
2009
IEEE
158views Hardware» more  ISCA 2009»
15 years 4 months ago
Boosting single-thread performance in multi-core systems through fine-grain multi-threading
Industry has shifted towards multi-core designs as we have hit the memory and power walls. However, single thread performance remains of paramount importance since some applicatio...
Carlos Madriles, Pedro López, Josep M. Codi...