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» Architectural Design via Declarative Programming
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DAC
2009
ACM
15 years 4 months ago
Clock skew optimization via wiresizing for timing sign-off covering all process corners
Manufacturing process variability impacts the performance of synchronous logic circuits by means of its effect on both clock network and functional block delays. Typically, varia...
Sari Onaissi, Khaled R. Heloue, Farid N. Najm
JAVA
1999
Springer
15 years 1 months ago
Interfacing Java to the Virtual Interface Architecture
User-level network interfaces (UNIs) have reduced the overheads of communication by exposing the buffers used by the network interface DMA engine to the applications. This removes...
Chi-Chao Chang, Thorsten von Eicken
VLSID
2003
IEEE
110views VLSI» more  VLSID 2003»
15 years 10 months ago
A New Reactive Processor with Architectural Support for Control Dominated Embedded Systems
Control dominated embedded systems have to be designed for fast reaction to asynchronous external events occurring in the environment. Such systems must be able to perform signal ...
Partha S. Roop, Zoran A. Salcic, Morteza Biglari-A...
SIGMOD
2007
ACM
157views Database» more  SIGMOD 2007»
15 years 9 months ago
Compiling mappings to bridge applications and databases
Translating data and data access operations between applications and databases is a longstanding data management problem. We present a novel approach to this problem, in which the...
Sergey Melnik, Atul Adya, Philip A. Bernstein
VEE
2009
ACM
146views Virtualization» more  VEE 2009»
15 years 4 months ago
Demystifying magic: high-level low-level programming
r of high-level languages lies in their abstraction over hardware and software complexity, leading to greater security, better reliability, and lower development costs. However, o...
Daniel Frampton, Stephen M. Blackburn, Perry Cheng...