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» Architectural Semantics for Practical Transactional Memory
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ECOOP
2008
Springer
13 years 8 months ago
A Uniform Transactional Execution Environment for Java
Abstract. Transactional memory (TM) has recently emerged as an effective tool for extracting fine-grain parallelism from declarative critical sections. In order to make STM systems...
Lukasz Ziarek, Adam Welc, Ali-Reza Adl-Tabatabai, ...
FORTE
2008
13 years 7 months ago
Checking Correctness of Transactional Behaviors
Abstract. The Signal Calculus is an asynchronous process calculus featuring multicast communication. It relies on explicit modeling of the communication structure of the network (c...
Vincenzo Ciancia, Gian Luigi Ferrari, Roberto Guan...
MICRO
2010
IEEE
172views Hardware» more  MICRO 2010»
13 years 4 months ago
Architectural Support for Fair Reader-Writer Locking
Abstract--Many shared-memory parallel systems use lockbased synchronization mechanisms to provide mutual exclusion or reader-writer access to memory locations. Software locks are i...
Enrique Vallejo, Ramón Beivide, Adriá...
FPGA
2007
ACM
124views FPGA» more  FPGA 2007»
14 years 17 days ago
A practical FPGA-based framework for novel CMP research
Chip-multiprocessors are quickly gaining momentum in all segments of computing. However, the practical success of CMPs strongly depends on addressing the difficulty of multithread...
Sewook Wee, Jared Casper, Njuguna Njoroge, Yuriy T...
ARCS
2009
Springer
14 years 1 months ago
Improving Memory Subsystem Performance Using ViVA: Virtual Vector Architecture
The disparity between microprocessor clock frequencies and memory latency is a primary reason why many demanding applications run well below peak achievable performance. Software c...
Joseph Gebis, Leonid Oliker, John Shalf, Samuel Wi...