117 search results - page 19 / 24 » Architectural and technology influence on the optimal total ... |
ISSS
1997
IEEE
15 years 1 months ago
1997
IEEE
This paper presents a novel source-level dynamic analysis methodology and tool for High-Level Synthesis (HLS). It not only for the first time enables HLS to offer source-level de...
DAC
2010
ACM
15 years 1 months ago
2010
ACM
Research on Networks on Chips (NoCs) has spanned over a decade and its results are now visible in some products. Thus the seminal idea of using networking technology to address th...
ISCAS
2005
IEEE
15 years 3 months ago
2005
IEEE
—A triangle setup engine (TSE) generates setup parameters for rasterization in 3D graphics hardware. Since the TSE must be flexible for various embedded systems, a programmable T...
DAC
2006
ACM
15 years 10 months ago
2006
ACM
Deploying multiple supply voltages (multi-Vdds) on one chip is an important technique to reduce dynamic power consumption. In this work we present an optimality study for resource...
DSD
2009
IEEE
15 years 4 months ago
2009
IEEE
— 3D stacked architectures provide significant benefits in performance, footprint and yield. However, vertical stacking increases the thermal resistances, and exacerbates tempe...