117 search results - page 6 / 24 » Architectural and technology influence on the optimal total ... |
VLSID
2008
IEEE
15 years 10 months ago
2008
IEEE
Continuous technology scaling has resulted in an increase in both, the power density as well as the variation in device dimensions (process variations) of the manufactured process...
ASPDAC
2004
ACM
15 years 3 months ago
2004
ACM
- Data path connection elements, such as multiplexers, consume a significant amount of area on a VLSI chip, especially for FPGA designs. Multiplexer optimization is a difficult pro...
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ESTIMEDIA
2008
Springer
14 years 11 months ago
2008
Springer
The relentless increase in multimedia embedded system application requirements as well as improvements in IC design technology have motivated the deployment of chip multiprocessor ...
VLSID
2005
IEEE
15 years 10 months ago
2005
IEEE
One of the main challenges for design in the presence of process variations is to cope with the uncertainties in delay and leakage power. In this paper, the influence of leakage r...
ASPDAC
2009
ACM
15 years 1 months ago
2009
ACM
Abstract-- The increasing wire delay constraints in deep submicron VLSI designs have led to the emergence of scalable and modular Network-on-Chip (NoC) architectures. As the power ...