312 search results - page 16 / 63 » Architectural approaches to reduce leakage energy in caches |
109
click to vote
DAC
2004
ACM
16 years 22 days ago
2004
ACM
A five-fold increase in leakage current is predicted with each technology generation. While Dynamic Voltage Scaling (DVS) is known to reduce dynamic power consumption, it also cau...
VLSID
2003
IEEE
16 years 4 days ago
2003
IEEE
Reducing leakage power and improving the reliability of data stored in the memory cells are both becoming challenging as technology scales down. While the smaller threshold voltag...
107
click to vote
DATE
2004
IEEE
15 years 3 months ago
2004
IEEE
: Static energy dissipation in cache memories will constitute an increasingly larger portion of total microprocessor energy dissipation due to nanoscale technology characteristics ...
74
Voted
HPCA
2001
IEEE
16 years 3 days ago
2001
IEEE
We propose methods for reducing the energy consumed by snoop requests in snoopy bus-based symmetric multiprocessor (SMP) systems. Observing that a large fraction of snoops do not ...
IJCSS
2007
14 years 11 months ago
2007
This paper presents a low power driven synthesis framework for the unique class of nonregenerative Boolean Read-Once Functions (BROF). A two-pronged approach is adopted, where the...