312 search results - page 23 / 63 » Architectural approaches to reduce leakage energy in caches |
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PPOPP
2005
ACM
15 years 5 months ago
2005
ACM
Disk subsystem is known to be a major contributor to overall power consumption of high-end parallel systems. Past research proposed several architectural level techniques to reduc...
78
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ICCD
2004
IEEE
15 years 8 months ago
2004
IEEE
This paper proposes a power-aware cache block allocation algorithm for the way-selective setassociative cache on embedded systems to reduce energy consumption without additional d...
DATE
2009
IEEE
15 years 6 months ago
2009
IEEE
Abstract—To deal with the “memory wall” problem, microprocessors include large secondary on-chip caches. But as these caches enlarge, they originate a new latency gap between...
IPPS
2000
IEEE
15 years 4 months ago
2000
IEEE
Parallel programs that modify shared data in a cachecoherent multiprocessor with a write-invalidate coherence protocol create ownership overhead in the form of ownership acquisiti...
ISCA
2005
IEEE
15 years 5 months ago
2005
IEEE
Sensor network processors and their applications are a growing area of focus in computer system research and design. Inherent to this design space is a reduced processing performa...