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» Architectural approaches to reduce leakage energy in caches
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CAINE
2006
15 years 1 months ago
A multiobjective evolutionary approach for constrained joint source code optimization
The synergy of software and hardware leads to efficient application expression profile (AEP) not only in terms of execution time and energy but also optimal architecture usage. We...
Naeem Zafar Azeemi
DAC
2004
ACM
16 years 22 days ago
Proxy-based task partitioning of watermarking algorithms for reducing energy consumption in mobile devices
Digital watermarking is a process that embeds an imperceptible signature or watermark in a digital file containing audio, image, text or video data. The watermark is later used to...
Arun Kejariwal, Sumit Gupta, Alexandru Nicolau, Ni...
VLSID
2008
IEEE
111views VLSI» more  VLSID 2008»
16 years 4 days ago
Power Reduction of Functional Units Considering Temperature and Process Variations
Continuous technology scaling has resulted in an increase in both, the power density as well as the variation in device dimensions (process variations) of the manufactured process...
Deepa Kannan, Aviral Shrivastava, Sarvesh Bhardwaj...
RTAS
2005
IEEE
15 years 5 months ago
Feedback-Based Dynamic Voltage and Frequency Scaling for Memory-Bound Real-Time Applications
Dynamic voltage and frequency scaling is increasingly being used to reduce the energy requirements of embedded and real-time applications by exploiting idle CPU resources, while s...
Christian Poellabauer, Leo Singleton, Karsten Schw...
VLSID
2009
IEEE
143views VLSI» more  VLSID 2009»
16 years 11 days ago
SACR: Scheduling-Aware Cache Reconfiguration for Real-Time Embedded Systems
Dynamic reconfiguration techniques are widely used for efficient system optimization. Dynamic cache reconfiguration is a promising approach for reducing energy consumption as well...
Weixun Wang, Prabhat Mishra, Ann Gordon-Ross