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» Architectural approaches to reduce leakage energy in caches
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TC
2008
14 years 11 months ago
Exploiting In-Memory and On-Disk Redundancy to Conserve Energy in Storage Systems
Abstract--Today's storage systems place an imperative demand on energy efficiency. A storage system often places single-rotationrate disks into standby mode by stopping them f...
Jun Wang, Xiaoyu Yao, Huijun Zhu
DAC
2009
ACM
16 years 23 days ago
NoC topology synthesis for supporting shutdown of voltage islands in SoCs
In many Systems on Chips (SoCs), the cores are clustered in to voltage islands. When cores in an island are unused, the entire island can be shutdown to reduce the leakage power c...
Ciprian Seiculescu, Srinivasan Murali, Luca Benini...
ESTIMEDIA
2005
Springer
15 years 5 months ago
Scratchpad Sharing Strategies for Multiprocess Embedded Systems: A First Approach
Portable embedded systems require diligence in managing their energy consumption. Thus, power efficient processors coupled with onchip memories (e.g. caches, scratchpads) are the...
Manish Verma, Klaus Petzold, Lars Wehmeyer, Heiko ...
IEEEPACT
2006
IEEE
15 years 5 months ago
Branch predictor guided instruction decoding
Fast instruction decoding is a challenge for the design of CISC microprocessors. A well-known solution to overcome this problem is using a trace cache. It stores and fetches alrea...
Oliverio J. Santana, Ayose Falcón, Alex Ram...
MICRO
2010
IEEE
146views Hardware» more  MICRO 2010»
14 years 9 months ago
The ZCache: Decoupling Ways and Associativity
The ever-increasing importance of main memory latency and bandwidth is pushing CMPs towards caches with higher capacity and associativity. Associativity is typically improved by in...
Daniel Sanchez, Christos Kozyrakis