312 search results - page 3 / 63 » Architectural approaches to reduce leakage energy in caches |
ICCD
2007
IEEE
14 years 22 days ago
2007
IEEE
Leakage power has grown significantly and is a major challenge in microprocessor design. Leakage is the dominant power component in second-level (L2) caches. This paper presents t...
APCSAC
2006
IEEE
14 years 14 days ago
2006
IEEE
This paper describes a new on-demand wakeup prediction policy for instruction cache leakage control that achieves better leakage savings than prior policies, and avoids the perform...
ICCD
2003
IEEE
14 years 3 months ago
2003
IEEE
This paper investigates some power efficient data cache designs that try to significantly reduce the cache energy consumption, both static and dynamic, with a minimal impact in pe...
MICRO
2003
IEEE
13 years 11 months ago
2003
IEEE
High-performance caches statically pull up the bitlines in all cache subarrays to optimize cache access latency. Unfortunately, such an architecture results in a significant wast...
ISLPED
2005
ACM
13 years 12 months ago
2005
ACM
As transistors keep shrinking and on-chip data caches keep growing, static power dissipation due to leakage of caches takes an increasing fraction of total power in processors. Se...