312 search results - page 45 / 63 » Architectural approaches to reduce leakage energy in caches |
100
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POPL
2009
ACM
15 years 6 months ago
2009
ACM
With the emergence of commodity multicore architectures, exploiting tightly-coupled parallelism has become increasingly important. Functional programming languages, such as Haskel...
ISCA
2010
IEEE
15 years 4 months ago
2010
IEEE
In computer architecture, caches have primarily been viewed as a means to hide memory latency from the CPU. Cache policies have focused on anticipating the CPU’s data needs, and...
105
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TVLSI
2010
14 years 6 months ago
2010
Dynamic gates have been excellent choice in the design of high-performance modules in modern microprocessors. The only limitation of dynamic gates is their relatively low noise mar...
VLDB
1999
ACM
15 years 4 months ago
1999
ACM
Data intensive applications today usually run in either a clientserver or a middleware environment. In either case, they must efficiently handle both database queries, which proc...
ICCAD
2005
IEEE
15 years 8 months ago
2005
IEEE
— One of the critical goals in code optimization for MPSoC architectures is to minimize the number of off-chip memory accesses. This is because such accesses can be extremely cos...