312 search results - page 6 / 63 » Architectural approaches to reduce leakage energy in caches |
HPCA
2001
IEEE
16 years 1 days ago
2001
IEEE
103
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GLVLSI
2007
IEEE
15 years 6 months ago
2007
IEEE
Energy consumption is a major concern in embedded computing systems. Several studies have shown that cache memories account for about 40% or more of the total energy consumed in t...
CASES
2008
ACM
15 years 1 months ago
2008
ACM
This paper proposes a combination of circuit and architectural techniques to maximize leakage power reduction in embedded processor on-chip caches. It targets cache peripheral cir...
116
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HPCA
2009
IEEE
16 years 7 days ago
2009
IEEE
Magnetic Random Access Memory (MRAM) is considered to be a promising future memory technology due to its low leakage power, high density and fast read speed. The heterogeneous int...
100
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CASES
2004
ACM
15 years 5 months ago
2004
ACM
While the dynamic voltage scaling (DVS) techniques are efficient in reducing the dynamic energy consumption for the processor, varying voltage alone becomes less effective for t...