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ASPLOS
2008
ACM
13 years 8 months ago
The mapping collector: virtual memory support for generational, parallel, and concurrent compaction
Parallel and concurrent garbage collectors are increasingly employed by managed runtime environments (MREs) to maintain scalability, as multi-core architectures and multi-threaded...
Michal Wegiel, Chandra Krintz
APCSAC
2003
IEEE
13 years 10 months ago
Simultaneous MultiStreaming for Complexity-Effective VLIW Architectures
Very Long Instruction Word (VLIW) architectures exploit instruction level parallelism (ILP) with the help of the compiler to achieve higher instruction throughput with minimal hard...
Pradeep Rao, S. K. Nandy, M. N. V. Satya Kiran
VLDB
1991
ACM
143views Database» more  VLDB 1991»
13 years 10 months ago
Handling Data Skew in Multiprocessor Database Computers Using Partition Tuning
Shared nothing multiprocessor archit.ecture is known t.obe more scalable to support very large databases. Compared to other join strategies, a hash-ba9ed join algorithm is particu...
Kien A. Hua, Chiang Lee
DATE
2006
IEEE
100views Hardware» more  DATE 2006»
14 years 12 days ago
Simulation and analysis of network on chip architectures: ring, spidergon and 2D mesh
NoC architectures can be adopted to support general communications among multiple IPs over multi-processor Systems on Chip (SoCs). In this work we illustrate the modeling and simu...
Luciano Bononi, Nicola Concer
HPCA
2005
IEEE
14 years 6 months ago
Improving Multiple-CMP Systems Using Token Coherence
Improvements in semiconductor technology now enable Chip Multiprocessors (CMPs). As many future computer systems will use one or more CMPs and support shared memory, such systems ...
Michael R. Marty, Jesse D. Bingham, Mark D. Hill, ...