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148
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CODES
2005
IEEE
15 years 10 months ago
Automatic network generation for system-on-chip communication design
With growing system complexities, system-level communication design is becoming increasingly important and advanced, network-oriented communication architectures become necessary....
Dongwan Shin, Andreas Gerstlauer, Rainer Döme...
92
Voted
DAC
2004
ACM
15 years 10 months ago
A timing-driven module-based chip design flow
A Module-Rased design flow for digital ICs with hard and sofl modules is presented. Versions of the sofl modules are implemented with different areddelay characteristics. The vers...
Fan Mo, Robert K. Brayton
FPGA
2000
ACM
120views FPGA» more  FPGA 2000»
15 years 8 months ago
A novel high throughput reconfigurable FPGA architecture
With increased logic density due to the shift towards Deep Submicron technologies (DSM), FPGAs have become a viable option for implementing large designs. However, most commercial...
Amit Singh, Luca Macchiarulo, Arindam Mukherjee, M...
ROBIO
2006
IEEE
130views Robotics» more  ROBIO 2006»
15 years 11 months ago
GA-Based Multi-Objective Optimal Design of a Planar 3-DOF Cable-Driven Parallel Manipulator
— The architecture optimization of a three degrees of freedom (3-DOF) planar cable-driven parallel manipulator (CDPM) with multiple objectives has been implemented by means of GA...
Yangmin Li, Qingsong Xu
KBSE
2006
IEEE
15 years 11 months ago
Modularity Analysis of Logical Design Models
Traditional design representations are inadequate for generalized reasoning about modularity in design and its technical and economic implications. We have developed an architectu...
Yuanfang Cai, Kevin J. Sullivan