Sciweavers

23406 search results - page 4586 / 4682
» Architecture, Design, Implementation
Sort
View
IPPS
2003
IEEE
15 years 3 months ago
Multi-Paradigm Framework for Parallel Image Processing
A software framework for the parallel execution of sequential programs using C++ classes is presented. The functional language Concurrent ML is used to implement the underlying ha...
David J. Johnston, Martin Fleury, Andy C. Downton
ITC
2003
IEEE
168views Hardware» more  ITC 2003»
15 years 3 months ago
A Built-In Self-Repair Scheme for Semiconductor Memories with 2-D Redundancy
Embedded memories are among the most widely used cores in current system-on-chip (SOC) implementations. Memory cores usually occupy a significant portion of the chip area, and do...
Jin-Fu Li, Jen-Chieh Yeh, Rei-Fu Huang, Cheng-Wen ...
MEMOCODE
2003
IEEE
15 years 3 months ago
LOTOS Code Generation for Model Checking of STBus Based SoC: the STBus interconnect
In the design process of SoC (System on Chip), validation is one of the most critical and costly activity. The main problem for industrial companies like STMicroelectronics, stand...
Pierre Wodey, Geoffrey Camarroque, Fabrice Baray, ...
MICRO
2003
IEEE
143views Hardware» more  MICRO 2003»
15 years 3 months ago
VSV: L2-Miss-Driven Variable Supply-Voltage Scaling for Low Power
Energy-efficient processor design is becoming more and more important with technology scaling and with high performance requirements. Supply-voltage scaling is an efficient way to...
Hai Li, Chen-Yong Cher, T. N. Vijaykumar, Kaushik ...
PDP
2003
IEEE
15 years 3 months ago
QoS-aware Accounting in Mobile Computing Scenarios
The enlarging market of portable devices and wireless networks stimulates the provisioning of mobilityenabled Internet services with differentiated levels of Quality of Service (Q...
Paolo Bellavista, Antonio Corradi, Silvia Vecchi
« Prev « First page 4586 / 4682 Last » Next »