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» Architecture Level Power-Performance Tradeoffs for Pipelined...
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ASPLOS
2010
ACM
14 years 1 months ago
Speculative parallelization using software multi-threaded transactions
With the right techniques, multicore architectures may be able to continue the exponential performance trend that elevated the performance of applications of all types for decades...
Arun Raman, Hanjun Kim, Thomas R. Mason, Thomas B....
CN
2002
82views more  CN 2002»
13 years 6 months ago
Optimal allocation of electronic content
Abstract-The delivery of large files to single users, such as application programs for some versions of the envisioned network computer, or movies, is expected by many to be one of...
Israel Cidon, Shay Kutten, Ran Soffer
ISCA
2009
IEEE
239views Hardware» more  ISCA 2009»
14 years 26 days ago
Scalable high performance main memory system using phase-change memory technology
The memory subsystem accounts for a significant cost and power budget of a computer system. Current DRAM-based main memory systems are starting to hit the power and cost limit. A...
Moinuddin K. Qureshi, Vijayalakshmi Srinivasan, Ju...
DAC
2005
ACM
14 years 7 months ago
User-perceived latency driven voltage scaling for interactive applications
Power has become a critical concern for battery-driven computing systems, on which many applications that are run are interactive. System-level voltage scaling techniques, such as...
Le Yan, Lin Zhong, Niraj K. Jha
VLSID
2002
IEEE
151views VLSI» more  VLSID 2002»
14 years 6 months ago
Mode Selection and Mode-Dependency Modeling for Power-Aware Embedded Systems
Among the many techniques for system-level power management, it is not currently possible to guarantee timing constraints and have a comprehensive system model at the same time. S...
Dexin Li, Pai H. Chou, Nader Bagherzadeh