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» Architecture and Implementation of an Embedded Wormhole
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NOCS
2007
IEEE
15 years 6 months ago
NoC Design and Implementation in 65nm Technology
As embedded computing evolves towards ever more powerful architectures, the challenge of properly interconnecting large numbers of on-chip computation blocks is becoming prominent...
Antonio Pullini, Federico Angiolini, Paolo Meloni,...
APCSAC
2001
IEEE
15 years 3 months ago
High-Performance Extendable Instruction Set Computing
In this paper, a new architecture called the extendable instruction set computer (EISC) is introduced that addresses the issues of memory size and performance in embedded micropro...
Heui Lee, Paul Becket, Bill Appelbe
ETS
2006
IEEE
108views Hardware» more  ETS 2006»
15 years 6 months ago
A DFT Architecture for Asynchronous Networks-on-Chip
The Networks-on-Chip (NoCs) paradigm is emerging as a solution for the communication of SoCs. Many NoC architecture propositions are presented but few works on testing these netwo...
Xuan-Tu Tran, Jean Durupt, François Bertran...
GLVLSI
2009
IEEE
158views VLSI» more  GLVLSI 2009»
15 years 3 months ago
Exploration of memory hierarchy configurations for efficient garbage collection on high-performance embedded systems
Modern embedded devices (e.g., PDAs, mobile phones) are now incorporating Java as a very popular implementation language in their designs. These new embedded systems include multi...
José Manuel Velasco, David Atienza, Katzali...
IPPS
2000
IEEE
15 years 3 months ago
Developing an Open Architecture for Performance Data Mining
Performance analysis of high performance systems is a difficult task. Current tools have proven successful in analysis tasks but their implementation is limited in several respects...
David B. Pierce, Diane T. Rover