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» Architecture and Implementation of an Embedded Wormhole
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DAC
2008
ACM
16 years 26 days ago
An 8x8 run-time reconfigurable FPGA embedded in a SoC
This paper presents a RTR FPGA embedded in a System on Chip fabricated in 130nm CMOS process. Various aspects of the design flow, from automation to floor-planning are discussed. ...
Sumanta Chaudhuri, Sylvain Guilley, Florent Flamen...
ISCAS
2005
IEEE
167views Hardware» more  ISCAS 2005»
15 years 5 months ago
A 33.2M vertices/sec programmable geometry engine for multimedia embedded systems
—This paper proposes a programmable geometry engine (GE) reducing the expensive internal buffers and register files of the conventional programmable GEs and sharing datapaths of ...
Chang-Hyo Yu, Donghyun Kim, Lee-Sup Kim
ASAP
2004
IEEE
171views Hardware» more  ASAP 2004»
15 years 3 months ago
CHARMED: A Multi-Objective Co-Synthesis Framework for Multi-Mode Embedded Systems
In this paper, we present a modular co-synthesis framework called CHARMED that solves the problem of hardware-software co-synthesis of periodic, multi-mode, distributed, embedded ...
Vida Kianzad, Shuvra S. Bhattacharyya
FPGA
2006
ACM
92views FPGA» more  FPGA 2006»
15 years 3 months ago
Embedded floating-point units in FPGAs
Due to their generic and highly programmable nature, FPGAs provide the ability to implement a wide range of applications. However, it is this nonspecific nature that has limited t...
Michael J. Beauchamp, Scott Hauck, Keith D. Underw...
FPGA
2006
ACM
98views FPGA» more  FPGA 2006»
15 years 3 months ago
A reconfigurable hardware based embedded scheduler for buffered crossbar switches
In this paper, we propose a new internally buffered crossbar (IBC) switching architecture where the input and output distributed schedulers are embedded inside the crossbar fabric...
Lotfi Mhamdi, Christopher Kachris, Stamatis Vassil...