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» Architecture driven circuit partitioning
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ASPDAC
2006
ACM
117views Hardware» more  ASPDAC 2006»
15 years 7 months ago
Signal-path driven partition and placement for analog circuit
This paper advances a new methodology based on signal-path information to resolve the problem of device-level placement for analog layout. This methodology is mainly based on three...
Di Long, Xianlong Hong, Sheqin Dong
87
Voted
DAC
1995
ACM
15 years 5 months ago
Timing Driven Placement for Large Standard Cell Circuits
William Swartz, Carl Sechen
106
Voted
SAMOS
2004
Springer
15 years 7 months ago
High-Speed Event-Driven RTL Compiled Simulation
In this paper we present a new approach for generating high-speed optimized event-driven register transfer level (RTL) compiled simulators. The generation of the simulators is part...
Alexey Kupriyanov, Frank Hannig, Jürgen Teich
70
Voted
DAC
2000
ACM
16 years 2 months ago
Performance driven multi-level and multiway partitioning with retiming
Jason Cong, Sung Kyu Lim, Chang Wu