Sciweavers

482 search results - page 13 / 97
» Architecture-level performance evaluation of component-based...
Sort
View
WORDS
2005
IEEE
15 years 3 months ago
A Framework for Simplifying the Development of Kernel Schedulers: Design and Performance Evaluation
Writing a new scheduler and integrating it into an existing OS is a daunting task, requiring the understanding of multiple low-level kernel mechanisms. Indeed, implementing a new ...
Gilles Muller, Julia L. Lawall, Hervé Duche...
105
Voted
SIES
2010
IEEE
14 years 7 months ago
An Energy-Aware Algorithm for TDMA MAC Protocols in Real-Time Wireless Networks
Abstract--In distributed embedded systems operated by battery, energy management is a critical issue that has to be addressed at different architecture levels. For systems that tig...
Gianluca Franchino, Giorgio C. Buttazzo, Mauro Mar...
WOSP
2005
ACM
15 years 3 months ago
Run-time performance management of the Siena publish/subscribe middleware
Recently, growing attention is focused on run-time management of Quality of Service (QoS) of complex software systems. In this context, self-adaptation of applications, based on r...
Mauro Caporuscio, Antinisca Di Marco, Paola Invera...
FPL
2007
Springer
124views Hardware» more  FPL 2007»
15 years 3 months ago
HARTES Toolchain Early Evaluation: Profiling, Compilation and HDL Generation
The aim of the hArtes project is to facilitate and automate the rapid design and development of heterogeneous embedded systems, targeting a combination of a general purpose embedd...
Koen Bertels, Georgi Kuzmanov, Elena Moscu Panaint...
ISCAS
2007
IEEE
123views Hardware» more  ISCAS 2007»
15 years 3 months ago
Evaluating Network-on-Chip for Homogeneous Embedded Multiprocessors in FPGAs
— This paper presents performance and area evaluation of a homogeneous multiprocessor communication system based on network-on-chip (NoC) in FPGA platforms. Two homogenous chip m...
Henrique C. Freitas, Dalton M. Colombo, Fernanda L...