2 search results - page 1 / 1 » Area-Efficient Arithmetic Expression Evaluation Using Deeply... |
91
Voted
TVLSI
2008
15 years 4 days ago
2008
Recently, it has become possible to implement floating-point cores on field-programmable gate arrays (FPGAs) to provide acceleration for the myriad applications that require high-p...
139
Voted
FPGA
2010
ACM
15 years 13 days ago
2010
ACM
We use reconfigurable hardware to construct a high throughput Bayesian computing machine (BCM) capable of evaluating probabilistic networks with arbitrary DAG (directed acyclic gr...