6 search results - page 1 / 2 » Area-Efficient Selective Multi-Threshold CMOS Design Methodo... |
DATE
2005
IEEE
2005
IEEE
Area-Efficient Selective Multi-Threshold CMOS Design Methodology for Standby Leakage Power Reduction
15 years 3 months ago
This paper presents a design flow for an improved selective multi-threshold(Selective-MT) circuit. The Selective-MT circuit is improved so that plural MT-cells can share one switc...
101
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GLVLSI
2007
IEEE
15 years 4 months ago
2007
IEEE
- The Multi-Threshold CMOS (MTCMOS) technology has become a popular technique for standby power reduction. This technology utilizes high-Vth sleep transistors to reduce subthreshol...
ASPDAC
2006
ACM
15 years 3 months ago
2006
ACM
- One of the critical issues in MTCMOS design is how to estimate a circuit delay quickly. In this paper, we propose a delay modeling and static timing analysis (STA) methodology ta...
87
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ISLPED
2003
ACM
15 years 2 months ago
2003
ACM
The Multi-Threshold CMOS (MTCMOS) technology provides a solution to the high performance and low power design requirements of modern designs. While the low Vth transistors are use...
CHES
2003
Springer
15 years 2 months ago
2003
Springer
We introduce multi-channel attacks, i.e., side-channel attacks which utilize multiple side-channels such as power and EM simultaneously. We propose an adversarial model which combi...