Sciweavers

314 search results - page 27 / 63
» Arithmetic Coding Revisited
Sort
View
FPL
2008
Springer
207views Hardware» more  FPL 2008»
14 years 11 months ago
Bitstream compression techniques for Virtex 4 FPGAs
This paper examines the opportunity of using compression for accelerating the (re)configuration of FPGA devices, focusing on the choice of compression algorithms, and their hardwa...
Radu Stefan, Sorin Dan Cotofana
ICMCS
2006
IEEE
113views Multimedia» more  ICMCS 2006»
15 years 3 months ago
Motion Estimation for H.264/AVC using Programmable Graphics Hardware
We present an efficient implementation of motion estimation (ME) for H.264/AVC using programmable graphics hardware. The cost function for ME in H.264/AVC depends on the motion v...
Chi-Wang Ho, Oscar C. Au, S.-H. Gary Chan, Shu-Kei...
ICFP
1997
ACM
15 years 2 months ago
Implementing Bit-addressing with Specialization
General media-processing programs are easily expressed with bitaddressing and variable-sized bit-fields. But the natural implementation of bit-addressing relies on dynamic shift ...
Scott Draves
CORR
2008
Springer
113views Education» more  CORR 2008»
14 years 10 months ago
A Functional Hitchhiker's Guide to Hereditarily Finite Sets, Ackermann Encodings and Pairing Functions
The paper is organized as a self-contained literate Haskell program that implements elements of an executable finite set theory with focus on combinatorial generation and arithmet...
Paul Tarau
SIPEW
2009
Springer
119views Hardware» more  SIPEW 2009»
15 years 4 months ago
A Tale of Two Processors: Revisiting the RISC-CISC Debate
The contentious debates between RISC and CISC have died down, and a CISC ISA, the x86 continues to be popular. Nowadays, processors with CISC-ISAs translate the CISC instructions i...
Ciji Isen, Lizy K. John, Eugene John