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» Arithmetic optimization for custom instruction set synthesis
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CASES
2004
ACM
15 years 9 months ago
Scalable custom instructions identification for instruction-set extensible processors
Extensible processors allow addition of application-specific custom instructions to the core instruction set architecture. However, it is computationally expensive to automaticall...
Pan Yu, Tulika Mitra
DAC
2004
ACM
15 years 11 months ago
Area-efficient instruction set synthesis for reconfigurable system-on-chip designs
Silicon compilers are often used in conjunction with Field Programmable Gate Arrays (FPGAs) to deliver flexibility, fast prototyping, and accelerated time-to-market. Many of these...
Philip Brisk, Adam Kaplan, Majid Sarrafzadeh
ASAP
2003
IEEE
141views Hardware» more  ASAP 2003»
15 years 11 months ago
Automatic Instruction Set Extension and Utilization for Embedded Processors
There is a growing demand for application-specific embedded processors in system-on-a-chip designs. Current tools and design methodologies often require designers to manually spec...
Armita Peymandoust, Laura Pozzi, Paolo Ienne, Giov...
DAC
1997
ACM
15 years 10 months ago
Analysis and Evaluation of Address Arithmetic Capabilities in Custom DSP Architectures
—Many application-specific architectures provide indirect addressing modes with auto-increment/decrement arithmetic. Since these architectures generally do not feature an indexe...
Ashok Sudarsanam, Stan Y. Liao, Srinivas Devadas
EMSOFT
2001
Springer
15 years 10 months ago
Compiler Optimizations for Adaptive EPIC Processors
Abstract. Advances in VLSI technology have lead to a tremendous increase in the density and number of devices that can be manufactured in a single microchip. One of the interesting...
Krishna V. Palem, Surendranath Talla, Weng-Fai Won...