70 search results - page 6 / 14 » Arithmetic optimization for custom instruction set synthesis |
DATE
2007
IEEE
15 years 3 months ago
2007
IEEE
Application-specific customization of the instruction set helps embedded processors achieve significant performance and power efficiency. In this paper, we explore customizatio...
DATE
2002
IEEE
15 years 2 months ago
2002
IEEE
The design of application (-domain) specific instructionset processors (ASIPs), optimized for code size, has traditionally been accompanied by the necessity to program assembly, ...
IJCSA
2008
14 years 9 months ago
2008
Vector extensions for general purpose processors are an efficient feature to address the growing performance demand of multimedia and computer vision applications. Embedded proces...
ICCAD
2001
IEEE
15 years 6 months ago
2001
IEEE
: This paper describes ASF, a novel cell-level analog synthesis framework that can size and bias a given circuit topology subject to a set of performance objectives and a manufactu...
DATE
2008
IEEE
15 years 3 months ago
2008
IEEE
To satisfy high-performance computing demand in modern embedded devices, current embedded processor architectures provide designer with possibility either to define customized ins...