70 search results - page 8 / 14 » Arithmetic optimization for custom instruction set synthesis |
ARITH
2001
IEEE
15 years 1 months ago
2001
IEEE
The Instruction Set Architecture (ISA) of a programmable processor is the native languageof the machine. It defines the set of operations and resourcesthat are optimized for that ...
ISSS
1999
IEEE
15 years 1 months ago
1999
IEEE
We present a new exploration and optimization method to select customized implementations for dynamic data sets, as encountered in telecom network, database and multimedia applica...
HPCA
2000
IEEE
15 years 1 months ago
2000
IEEE
Processor architectures with tens to hundreds of arithmetic units are emerging to handle media processing applications. These applications, such as image coding, image synthesis, ...
ESTIMEDIA
2005
Springer
15 years 3 months ago
2005
Springer
Designing Application-Specific Instruction-set Processors (ASIPs) usually requires designing a custom datapath, and modifying instruction-set, instruction decoder, and compiler. A...
FPGA
2010
ACM
15 years 6 months ago
2010
ACM
d hardware design from behavior-level abstraction has drawn wide interest in FPGA-based acceleration and configurable computing research field. However, for many high-level progra...