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» Array SSA Form and Its Use in Parallelization
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HPCA
2008
IEEE
15 years 12 months ago
Regional congestion awareness for load balance in networks-on-chip
Interconnection networks-on-chip (NOCs) are rapidly replacing other forms of interconnect in chip multiprocessors and system-on-chip designs. Existing interconnection networks use...
Paul Gratz, Boris Grot, Stephen W. Keckler
ICS
2010
Tsinghua U.
15 years 9 months ago
Cryptography by Cellular Automata or How Fast Can Complexity Emerge in Nature?
Computation in the physical world is restricted by the following spatial locality constraint: In a single unit of time, information can only travel a bounded distance in space. A ...
Benny Applebaum, Yuval Ishai, Eyal Kushilevitz
CP
2005
Springer
15 years 5 months ago
Search and Inference in AI Planning
While Planning has been a key area in Artificial Intelligence since its beginnings, significant changes have occurred in the last decade as a result of new ideas and a more estab...
Hector Geffner
AI
2008
Springer
14 years 11 months ago
Speculative plan execution for information gathering
The execution performance of an information gathering plan can suffer significantly due to remote I/O latencies. A streaming dataflow model of execution addresses the problem to s...
Greg Barish, Craig A. Knoblock
BMCBI
2008
118views more  BMCBI 2008»
14 years 11 months ago
PseudoGeneQuest - Service for identification of different pseudogene types in the human genome
Background: Pseudogenes, nonfunctional copies of genes, evolve fast due the lack of evolutionary pressures and thus appear in several different forms. PseudoGeneQuest is an online...
Csaba P. Ortutay, Mauno Vihinen