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ISMVL
2007
IEEE
104views Hardware» more  ISMVL 2007»
15 years 7 months ago
Evaluation of Toggle Coverage for MVL Circuits Specified in the SystemVerilog HDL
Designing modern circuits comprised of millions of gates is a very challenging task. Therefore new directions are investigated for efficient modeling and verification of such syst...
Mahsan Amoui, Daniel Große, Mitchell A. Thor...
ISMVL
2007
IEEE
94views Hardware» more  ISMVL 2007»
15 years 7 months ago
Representations of Elementary Functions Using Edge-Valued MDDs
This paper proposes a method to represent elementary functions such as trigonometric, logarithmic, square root, and reciprocal functions using edge-valued multi-valued decision di...
Shinobu Nagayama, Tsutomu Sasao
TPHOL
2007
IEEE
15 years 7 months ago
Separation Logic for Small-Step cminor
Cminor is a mid-level imperative programming language; there are proved-correct optimizing compilers from C to Cminor and from Cminor to machine language. We have redesigned Cminor...
Andrew W. Appel, Sandrine Blazy
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TPHOL
2007
IEEE
15 years 7 months ago
Formalising Java's Data Race Free Guarantee
We formalise the data race free (DRF) guarantee provided by Java, as captured by the semi-formal Java Memory Model (JMM) [1] and published in the Java Language Specification [2]. ...
David Aspinall, Jaroslav Sevcík
TPHOL
2007
IEEE
15 years 7 months ago
HOL2P - A System of Classical Higher Order Logic with Second Order Polymorphism
Abstract. This paper introduces the logical system HOL2P that extends classical higher order logic (HOL) with type operator variables and universal types. HOL2P has explicit term o...
Norbert Völker
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