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» Assessing Architectural Complexity
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JEC
2006
88views more  JEC 2006»
15 years 4 months ago
Synchroscalar: Evaluation of an embedded, multi-core architecture for media applications
We present an overview of the Synchroscalar single-chip, multi-core processor. Through the design of Synchroscalar, we find that high energy efficiency and low complexity can be a...
John Oliver, Ravishankar Rao, Diana Franklin, Fred...
150
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JOT
2007
99views more  JOT 2007»
15 years 4 months ago
On Flash-Based DBMSs: Issues for Architectural Re-Examination
Flash memory is being rapidly deployed as data storage for mobile devices. Flash memory offers many advantages over hard disk, and considering its rapid technical improvement both...
Sang-Won Lee, Won Kim
SIGMETRICS
2002
ACM
161views Hardware» more  SIGMETRICS 2002»
15 years 3 months ago
Performance study of dispatching algorithms in multi-tier web architectures
The number and heterogeneity of requests to Web sites are increasing also because the Web technology is becoming the preferred interface for information systems. Many systems host...
Mauro Andreolini, Michele Colajanni, Ruggero Morse...
ANCS
2009
ACM
15 years 1 months ago
SANS: a scalable architecture for network intrusion prevention with stateful frontend
Inline stateful and deep inspection for intrusion prevention is becoming more challenging due to the increase in both the volume of network traffic and the complexity of the analy...
Fei He, Yaxuan Qi, Yibo Xue, Jun Li
ICASSP
2011
IEEE
14 years 7 months ago
Hardware architectures for successive cancellation decoding of polar codes
The recently-discovered polar codes are widely seen as a major breakthrough in coding theory. These codes achieve the capacity of many important channels under successive cancella...
Camille Leroux, Ido Tal, Alexander Vardy, Warren J...