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ICCD
2004
IEEE
98views Hardware» more  ICCD 2004»
16 years 1 months ago
Thermal-Aware IP Virtualization and Placement for Networks-on-Chip Architecture
Networks-on-Chip (NoC), a new SoC paradigm, has been proposed as a solution to mitigate complex on-chip interconnect problems. NoC architecture consists of a collection of IP core...
Wei-Lun Hung, Charles Addo-Quaye, Theo Theocharide...
DATE
2009
IEEE
113views Hardware» more  DATE 2009»
15 years 11 months ago
Scalable compile-time scheduler for multi-core architectures
As the number of cores continues to grow in both digital signal and general purpose processors, tools which perform automatic scheduling from model-based designs are of increasing...
Maxime Pelcat, Pierrick Menuet, Slaheddine Aridhi,...
DATE
2009
IEEE
138views Hardware» more  DATE 2009»
15 years 11 months ago
Hardware/software co-design architecture for thermal management of chip multiprocessors
—The sustained push for performance, transistor count, and instruction level parallelism has reached a point where chip level power density issues are at the forefront of design ...
Omer Khan, Sandip Kundu
VRCAI
2009
ACM
15 years 11 months ago
Segmentation of architecture shape information from 3D point cloud
Object Segmentation is an important step in object reconstruction from point cloud data of complex urban scenes and in applications to virtual environment. This paper focuses on s...
Xiaojuan Ning, Xiaopeng Zhang, Yinghui Wang, Marc ...
IISWC
2008
IEEE
15 years 10 months ago
A workload for evaluating deep packet inspection architectures
—High-speed content inspection of network traffic is an important new application area for programmable networking systems, and has recently led to several proposals for high-per...
Michela Becchi, Mark A. Franklin, Patrick Crowley