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» Assessing Architectural Complexity
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SIGMETRICS
1999
ACM
15 years 9 months ago
On the Use of Trace Sampling for Architectural Studies of Desktop Applications
This paper examines the feasibility of performing architectural studies with trace sampling for a suite of desktop application traces on Windows NT. This paper makes three contrib...
Patrick Crowley, Jean-Loup Baer
ASPDAC
2009
ACM
137views Hardware» more  ASPDAC 2009»
15 years 9 months ago
Reconfigurable double gate carbon nanotube field effect transistor based nanoelectronic architecture
-- Carbon nanotubes (CNTs) and carbon nanotube field effect transistors (CNFETs) have demonstrated extraordinary properties and are widely accepted as the building blocks of next g...
Bao Liu
158
Voted
DSD
2009
IEEE
147views Hardware» more  DSD 2009»
15 years 9 months ago
A High Performance Hardware Architecture for One Bit Transform Based Motion Estimation
Motion Estimation (ME) is the most computationally intensive part of video compression and video enhancement systems. One bit transform (1BT) based ME algorithms have low computat...
Abdulkadir Akin, Yigit Dogan, Ilker Hamzaoglu
ICCAD
2007
IEEE
151views Hardware» more  ICCAD 2007»
15 years 9 months ago
A design flow dedicated to multi-mode architectures for DSP applications
This paper addresses the design of multi-mode architectures for digital signal processing applications. We present a dedicated design flow and its associated high-level synthesis t...
Cyrille Chavet, Caaliph Andriamisaina, Philippe Co...
ICCD
2007
IEEE
105views Hardware» more  ICCD 2007»
15 years 9 months ago
Power-aware mapping for reconfigurable NoC architectures
A core mapping method for reconfigurable network-on-chip (NoC) architectures is presented in this paper. In most of the existing methods, mapping is carried out based on the traff...
Mehdi Modarressi, Hamid Sarbazi-Azad