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ISCA
2002
IEEE
115views Hardware» more  ISCA 2002»
15 years 10 months ago
ReVive: Cost-Effective Architectural Support for Rollback Recovery in Shared-Memory Multiprocessors
This paper presents ReVive, a novel general-purpose rollback recovery mechanism for shared-memory multiprocessors. ReVive carefully balances the conflicting requirements of avail...
Milos Prvulovic, Josep Torrellas, Zheng Zhang
OOPSLA
2009
Springer
15 years 10 months ago
Agile anthropology and Alexander's architecture: an essay in three voices
During its formative decades the software community looked twice to the theories of ChristopherAlexander for inspiration, both times failing to completely master the architect’s...
Jenny Quillien, Pam Rostal, Dave West
IPPS
2000
IEEE
15 years 9 months ago
Augmenting Modern Superscalar Architectures with Configurable Extended Instructions
The instruction sets of general-purpose microprocessors are designed to offer good performance across a wide range of programs. The size and complexity of the instruction sets, how...
Xianfeng Zhou, Margaret Martonosi
IPPS
1998
IEEE
15 years 9 months ago
Hyper Butterfly Network: A Scalable Optimally Fault Tolerant Architecture
Boundeddegreenetworks like deBruijn graphsor wrapped butterfly networks are very important from VLSI implementation point of view as well as for applications where the computing n...
Wei Shi, Pradip K. Srimani
DATE
2004
IEEE
126views Hardware» more  DATE 2004»
15 years 9 months ago
Generalized Latency-Insensitive Systems for Single-Clock and Multi-Clock Architectures
Latency-insensitive systems were recently proposed by Carloni et al. as a correct-by-construction methodology for single-clock system-on-a-chip (SoC) design using predesigned IP b...
Montek Singh, Michael Theobald