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HPCA
2009
IEEE
16 years 1 months ago
Voltage emergency prediction: Using signatures to reduce operating margins
Inductive noise forces microprocessor designers to sacrifice performance in order to ensure correct and reliable operation of their designs. The possibility of wide fluctuations i...
Vijay Janapa Reddi, Meeta Sharma Gupta, Glenn H. H...
87
Voted
HPCA
2005
IEEE
16 years 24 days ago
Software Directed Issue Queue Power Reduction
The issue logic of a superscalar processor dissipates a large amount of static and dynamic power. Furthermore, its power density makes it a hot-spot requiring expensive cooling sy...
Antonio González, Jaume Abella, Michael F. ...
HPCA
2004
IEEE
16 years 24 days ago
Hardware Support for Prescient Instruction Prefetch
This paper proposes and evaluates hardware mechanisms for supporting prescient instruction prefetch--an approach to improving single-threaded application performance by using help...
Tor M. Aamodt, Paul Chow, Per Hammarlund, Hong Wan...
MIDDLEWARE
2004
Springer
15 years 5 months ago
Monitoring the connectivity of a grid
Grid computing is a new paradigm that enables the distributed coordination of resources and services which are geographically dispersed, span multiple trust domains and are hetero...
Sergio Andreozzi, Augusto Ciuffoletti, Antonia Ghi...
107
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HPCA
2007
IEEE
15 years 6 months ago
An Adaptive Shared/Private NUCA Cache Partitioning Scheme for Chip Multiprocessors
The significant speed-gap between processor and memory and the limited chip memory bandwidth make last-level cache performance crucial for future chip multiprocessors. To use the...
Haakon Dybdahl, Per Stenström