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106
Voted
HPCA
2005
IEEE
16 years 24 days ago
On the Limits of Leakage Power Reduction in Caches
If current technology scaling trends hold, leakage power dissipation will soon become the dominant source of power consumption in high performance processors. Caches, due to the f...
Yan Meng, Timothy Sherwood, Ryan Kastner
94
Voted
ISHPC
1997
Springer
15 years 4 months ago
Implementing Iterative Solvers for Irregular Sparse Matrix Problems in High Performance Fortran
Abstract. Writing e cient iterative solvers for irregular, sparse matrices in HPF is hard. The locality in the computations is unclear, and for e ciency we use storage schemes that...
Eric de Sturler, Damian Loher
87
Voted
HPCA
1995
IEEE
15 years 4 months ago
Access Ordering and Memory-Conscious Cache Utilization
As processor speeds increase relative to memory speeds, memory bandwidth is rapidly becoming the limiting performance factor for many applications. Several approaches to bridging ...
Sally A. McKee, William A. Wulf
CASES
2006
ACM
15 years 6 months ago
Limitations of special-purpose instructions for similarity measurements in media SIMD extensions
Microprocessor vendors have provided special-purpose instructions such as psadbw and pdist to accelerate the sumof-absolute differences (SAD) similarity measurement. The usefulne...
Asadollah Shahbahrami, Ben H. H. Juurlink, Stamati...
88
Voted
INTERWORKING
2000
15 years 4 months ago
Modelling and Performance Evaluation of a National Scale Switchless Based Network
In a packet switching based scenario, optical technologies can not completely overcome the problem of insufficient network capacity, due to limitations produced by the presence of ...
Josep Solé-Pareta, Davide Careglio, Salvato...