914 search results - page 40 / 183 » Assessing the performance limits of parallelized near-thresh... |
124
click to vote
IEEEPACT
2002
IEEE
15 years 5 months ago
2002
IEEE
Modern embedded systems often require high degrees of instruction-level parallelism (ILP) within strict constraints on power consumption and chip cost. Unfortunately, a high-perfo...
117
Voted
SKG
2005
IEEE
15 years 6 months ago
2005
IEEE
The conventional computing Grid has developed a service oriented computing architecture with a superlocal resource management and scheduling strategy. This architecture is limited...
111
click to vote
ICPP
2008
IEEE
15 years 7 months ago
2008
IEEE
This paper presents a two-part study on managing distributed NUCA (Non-Uniform Cache Architecture) L2 caches in a future manycore processor to obtain high singlethread program per...
123
Voted
Publication
The image compositing stages in cluster-parallel rendering for gathering and combining partial rendering results into a final display frame are fundamentally limited by node-to-nod...
97
Voted
IPPS
2006
IEEE
15 years 6 months ago
2006
IEEE
Network line cards are experiencing ever increasing line rates, random data bursts, and limited space. Hence, they are more vulnerable than other processormemory environments, to ...