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ISPASS
2010
IEEE
16 years 1 months ago
Cache contention and application performance prediction for multi-core systems
—The ongoing move to chip multiprocessors (CMPs) permits greater sharing of last-level cache by processor cores but this sharing aggravates the cache contention problem, potentia...
Chi Xu, Xi Chen, Robert P. Dick, Zhuoqing Morley M...
167
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FCT
2009
Springer
16 years 26 days ago
Alternating Weighted Automata
Weighted automata are finite automata with numerical weights on transitions. Nondeterministic weighted automata define quantitative languages L that assign to each word w a real ...
Krishnendu Chatterjee, Laurent Doyen, Thomas A. He...
EMMCVPR
2007
Springer
16 years 14 days ago
Bayesian Inference for Layer Representation with Mixed Markov Random Field
Abstract. This paper presents a Bayesian inference algorithm for image layer representation [26], 2.1D sketch [6], with mixed Markov random field. 2.1D sketch is an very important...
Ru-Xin Gao, Tianfu Wu, Song Chun Zhu, Nong Sang
CASES
2004
ACM
15 years 11 months ago
Procedure placement using temporal-ordering information: dealing with code size expansion
Abstract— In a direct-mapped instruction cache, all instructions that have the same memory address modulo the cache size, share a common and unique cache slot. Instruction cache ...
Christophe Guillon, Fabrice Rastello, Thierry Bida...
ECRTS
2003
IEEE
15 years 11 months ago
Using Supertasks to Improve Processor Utilization in Multiprocessor Real-Time Systems
We revisit the problem of supertasking in Pfair-scheduled multiprocessor systems. In this approach, a set of tasks, called component tasks, is assigned to a server task, called a ...
Philip Holman, James H. Anderson