Sciweavers

2184 search results - page 372 / 437
» Assistive Embedded Technologies
Sort
View
ISCAS
1999
IEEE
95views Hardware» more  ISCAS 1999»
15 years 10 months ago
Evaluating iterative improvement heuristics for bigraph crossing minimization
The bigraph crossing problem, embedding the two node sets of a bipartite graph G = V0;V1;E along two parallel lines so that edge crossings are minimized, has application to placeme...
Matthias F. M. Stallmann, Franc Brglez, Debabrata ...
ICCAD
1998
IEEE
153views Hardware» more  ICCAD 1998»
15 years 10 months ago
Intellectual property protection by watermarking combinational logic synthesis solutions
The intellectual property (IP) business model is vulnerable to a number of potentially devastating obstructions, such as misappropriation and intellectual property fraud. We propo...
Darko Kirovski, Yean-Yow Hwang, Miodrag Potkonjak,...
IFIP
1998
Springer
15 years 10 months ago
Combining Static Partitioning with Dynamic Distribution of Threads
This paper presents a hybrid approach to automatic parallelization of computer programs which combines static extraction of threads (tasks) with dynamic scheduling for parallel an...
Ronald Moore, Melanie Klang, Bernd Klauer, Klaus W...
DBPL
1997
Springer
94views Database» more  DBPL 1997»
15 years 10 months ago
Querying Multidimensional Databases
Abstract. Multidimensional databases are large collections of data, often historical, used for sophisticated analysis oriented to decision making. This activity is supported by an ...
Luca Cabibbo, Riccardo Torlone
ICCD
1993
IEEE
90views Hardware» more  ICCD 1993»
15 years 10 months ago
Subterranean: A 600 Mbit/Sec Cryptographic VLSI Chip
In this paper the design of a high-speed cryptographic coprocessor is presented. This coprocessor is named Subterranean and can be used for both cryptographic pseudorandom sequenc...
Luc J. M. Claesen, Joan Daemen, Mark Genoe, G. Pee...