103 search results - page 15 / 21 » Asymmetric Memory Fences: Optimizing Both Performance and Im... |
IEEEPACT
2007
IEEE
15 years 4 months ago
2007
IEEE
Many sorting algorithms have been studied in the past, but there are only a few algorithms that can effectively exploit both SIMD instructions and threadlevel parallelism. In this...
ICCAD
2008
IEEE
15 years 7 months ago
2008
IEEE
— Leveraging the power of scratchpad memories (SPMs) available in most embedded systems today is crucial to extract maximum performance from application programs. While regular a...
DAC
2000
ACM
15 years 11 months ago
2000
ACM
erse approaches at all levels of abstraction starting from the physical level up to the system level. Experience shows that a highlevel method may have a larger impact since the de...
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KBSE
2005
IEEE
15 years 3 months ago
2005
IEEE
Software for resource constrained embedded devices is often implemented in the Java programming language because the Java compiler and virtual machine provide enhanced safety, por...
CIDR
2009
14 years 11 months ago
2009
In database query processing, actual run-time conditions (e.g., actual selectivities and actual available memory) very often differ from compile-time expectations of run-time cond...