56 search results - page 10 / 12 » Asynchronous Design Using Commercial HDL Synthesis Tools |
108
Voted
TRETS
2010
14 years 10 months ago
2010
s, and abstractions, typically enabling faster development times than with traditional Hardware ion Languages (HDLs). However, programming at a higher level of abstraction is typic...
107
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ENTCS
2008
14 years 11 months ago
2008
This paper reports on the design of a test chip built to test a) a new latency insensitive network fabric protocol and circuits, b) a new synchronizer design, and c) how efficient...
105
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DATE
2000
IEEE
15 years 4 months ago
2000
IEEE
There has been a proliferation of block-diagram environments for specifying and prototyping DSP systems. These include tools from academia like Ptolemy [3], and GRAPE [7], and com...
86
Voted
GPCE
2008
Springer
15 years 20 days ago
2008
Springer
A user interface, such as a dialog, assists a user in synthesising a set of values, typically parameters for a command object. Code for “command parameter synthesis” is usuall...
ICCAD
2004
IEEE
15 years 8 months ago
2004
IEEE
—In this paper, we present a new block budgeting algorithm which speeds up timing closure in timing driven hierarchical flows. After a brief description of the addressed flow, ...