56 search results - page 5 / 12 » Asynchronous Design Using Commercial HDL Synthesis Tools |
DATE
2009
IEEE
15 years 4 months ago
2009
IEEE
— Clock-gating and power-gating have proven to be very effective solutions for reducing dynamic and static power, respectively. The two techniques may be coupled in such a way th...
92
Voted
ICCAD
1999
IEEE
15 years 1 months ago
1999
IEEE
This paper presents a new method to synthesize timed asynchronous circuits directly from the specification without generating a state graph. The synthesis procedure begins with a ...
90
Voted
RSP
2005
IEEE
15 years 3 months ago
2005
IEEE
Abstract— John von Neumann proposed his famous architecture in a context where hardware was very expensive and bulky. His goal was to maximize functionality with minimal hardware...
70
Voted
SBCCI
2006
ACM
15 years 3 months ago
2006
ACM
This paper presents the design of asynchronous circuits on synchronous FPGAs and CPLDs. Different design styles have been investigated through the implementation of dual-rail full...
148
Voted
TCAD
2011
14 years 4 months ago
2011
—Escalating system-on-chip design complexity is the design community to raise the level of abstraction beyond register transfer level. Despite the unsuccessful adoptions of early...