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» Asynchronous Design Using Commercial HDL Synthesis Tools
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GLVLSI
2003
IEEE
310views VLSI» more  GLVLSI 2003»
15 years 2 months ago
54x54-bit radix-4 multiplier based on modified booth algorithm
In this paper, we describe a low power and high speed multiplier suitable for standard cell-based ASIC design methodologies. For the purpose, an optimized booth encoder, compact 2...
Ki-seon Cho, Jong-on Park, Jin-seok Hong, Goang-se...
DATE
2006
IEEE
152views Hardware» more  DATE 2006»
15 years 3 months ago
Adaptive chip-package thermal analysis for synthesis and design
Ever-increasing integrated circuit (IC) power densities and peak temperatures threaten reliability, performance, and economical cooling. To address these challenges, thermal analy...
Yonghong Yang, Zhenyu (Peter) Gu, Changyun Zhu, Li...
VLSID
1998
IEEE
116views VLSI» more  VLSID 1998»
15 years 1 months ago
Synthesis of Testable RTL Designs
With several commercial tools becoming available, the high-level synthesis of applicationspeci c integrated circuits is nding wide spread acceptance in VLSI industry today. Existi...
C. P. Ravikumar, Sumit Gupta, Akshay Jajoo
GECCO
2007
Springer
138views Optimization» more  GECCO 2007»
15 years 3 months ago
Unwitting distributed genetic programming via asynchronous JavaScript and XML
The success of a genetic programming system in solving a problem is often a function of the available computational resources. For many problems, the larger the population size an...
Jon Klein, Lee Spector
SBCCI
2009
ACM
187views VLSI» more  SBCCI 2009»
15 years 2 months ago
Design of low complexity digital FIR filters
The multiplication of a variable by multiple constants, i.e., the multiple constant multiplications (MCM), has been a central operation and performance bottleneck in many applicat...
Levent Aksoy, Diego Jaccottet, Eduardo Costa