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» Aurora: An Approach to High Throughput Parallel Simulation
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87
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JSAC
2006
172views more  JSAC 2006»
14 years 9 months ago
A Memory-Efficient Parallel String Matching Architecture for High-Speed Intrusion Detection
The ability to inspect both packet headers and payloads to identify attack signatures makes network intrusion detection system (NIDS) a promising approach to protect Internet syste...
Hongbin Lu, Kai Zheng, Bin Liu, Xin Zhang, Y. Liu
ICASSP
2011
IEEE
14 years 1 months ago
Energy-optimized high performance FFT processor
This paper proposes an ultra low energy FFT processor suitable for sensor applications. The processor is based on R4MDC but achieves full utilization of computational elements. It...
Dongsuk Jeon, Mingoo Seok, Chaitali Chakrabarti, D...
85
Voted
WMASH
2003
ACM
15 years 2 months ago
End-to-end throughput and delay assurances in multihop wireless hotspots
Next generation Wireless Local Area Networks (WLAN’s) are likely to require multihop wireless connections between mobile nodes and Internet gateways to achieve high data rates f...
Kuang-Ching Wang, Parameswaran Ramanathan
IFIP
2000
Springer
15 years 1 months ago
Component Technology for High-Performance Scientific Simulation Software
We are developing scientific software component technology to manage the complexity of modern, parallel simulation software and increase the interoperability and re-use of scientif...
Thomas Epperly, Scott R. Kohn, Gary Kumfert
MICRO
2010
IEEE
153views Hardware» more  MICRO 2010»
14 years 7 months ago
Throughput-Effective On-Chip Networks for Manycore Accelerators
As the number of cores and threads in manycore compute accelerators such as Graphics Processing Units (GPU) increases, so does the importance of on-chip interconnection network des...
Ali Bakhoda, John Kim, Tor M. Aamodt