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ISCA
2010
IEEE
236views Hardware» more  ISCA 2010»
15 years 2 months ago
Elastic cooperative caching: an autonomous dynamically adaptive memory hierarchy for chip multiprocessors
Next generation tiled microarchitectures are going to be limited by off-chip misses and by on-chip network usage. Furthermore, these platforms will run an heterogeneous mix of ap...
Enric Herrero, José González, Ramon ...
INFOCOM
2011
IEEE
14 years 1 months ago
There's something about MRAI: Timing diversity can exponentially worsen BGP convergence
—To better support interactive applications, individual network operators are decreasing the timers that affect BGP convergence, leading to greater diversity in the timer setting...
Alex Fabrikant, Umar Syed, Jennifer Rexford
WWW
2003
ACM
15 years 10 months ago
Piazza: data management infrastructure for semantic web applications
The Semantic Web envisions a World Wide Web in which data is described with rich semantics and applications can pose complex queries. To this point, researchers have defined new l...
Alon Y. Halevy, Zachary G. Ives, Peter Mork, Igor ...
FCCM
2006
IEEE
133views VLSI» more  FCCM 2006»
15 years 3 months ago
A Scalable FPGA-based Multiprocessor
It has been shown that a small number of FPGAs can significantly accelerate certain computing tasks by up to two or three orders of magnitude. However, particularly intensive lar...
Arun Patel, Christopher A. Madill, Manuel Salda&nt...
SIGCOMM
1999
ACM
15 years 1 months ago
Routing with a Clue
We suggest a new simple forwarding technique to speed-up IP destination address lookup. The technique is a natural extension of IP, requires 5 bits in the IP header (IPv4, 7 in IP...
Anat Bremler-Barr, Yehuda Afek, Sariel Har-Peled