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DAC
2004
ACM
16 years 20 days ago
A frequency relaxation approach for analog/RF system-level simulation
The increasing complexity of today's mixed-signal integrated circuits necessitates both top-down and bottom-up system-level verification. Time-domain state-space modeling and...
Xin Li, Yang Xu, Peng Li, Padmini Gopalakrishnan, ...
DAC
2009
ACM
16 years 21 days ago
ILP-based pin-count aware design methodology for microfluidic biochips
Digital microfluidic biochips have emerged as a popular alternative for laboratory experiments. To make the biochip feasible for practical applications, pin-count reduction is a k...
Cliff Chiung-Yu Lin, Yao-Wen Chang
BTW
2009
Springer
146views Database» more  BTW 2009»
15 years 6 months ago
Towards Flash Disk Use in Databases - Keeping Performance While Saving Energy?
Abstract: Green computing or energy saving when processing information is primarily considered a task of processor development. We, however, advocate that a holistic approach is ne...
Theo Härder, Karsten Schmidt 0002, Yi Ou, Seb...
SGP
2007
15 years 2 months ago
Developable surfaces from arbitrary sketched boundaries
Developable surfaces are surfaces that can be unfolded into the plane with no distortion. Although ubiquitous in our everyday surroundings, modeling them using existing tools requ...
Kenneth Rose, Alla Sheffer, Jamie Wither, Marie-Pa...
SBACPAD
2006
IEEE
148views Hardware» more  SBACPAD 2006»
15 years 5 months ago
Scalable Parallel Implementation of Bayesian Network to Junction Tree Conversion for Exact Inference
We present a scalable parallel implementation for converting a Bayesian network to a junction tree, which can then be used for a complete parallel implementation for exact inferen...
Vasanth Krishna Namasivayam, Animesh Pathak, Vikto...