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DAC
2008
ACM
15 years 10 months ago
Automated transistor sizing for FPGA architecture exploration
The creation of an FPGA requires extensive transistor-level design. This is necessary for both the final design, and during architecture exploration, when many different logic and...
Ian Kuon, Jonathan Rose
AISB
1995
Springer
15 years 1 months ago
An Evolutionary Algorithm for Parametric Array Signal Processing
This paper presents an evolutionary algorithm for solving parameter optimization problems in parametric array signal processing. The method utilises the niche concept to maintain a...
Dekun Yang, Stuart J. Flockton
DSD
2009
IEEE
124views Hardware» more  DSD 2009»
15 years 4 months ago
Network-on-Chip Architecture Exploration Framework
— In this paper, we present a novel framework for the automated generation of Network-on-Chips (NoC) architectures, that enables architecture exploration and optimization. The au...
Timo Schönwald, Jochen Zimmermann, Oliver Bri...
AVSS
2006
IEEE
15 years 3 months ago
Scalable Surveillance Software Architecture
Video surveillance is a key technology for enhanced protection of facilities such as airports and power stations from various types of threat. Networks of thousands of IP-based ca...
Henry Detmold, Anthony R. Dick, Katrina E. Falkner...
TASE
2008
IEEE
14 years 9 months ago
An Intelligent Online Monitoring and Diagnostic System for Manufacturing Automation
Condition monitoring and fault diagnosis in modern manufacturing automation is of great practical significance. It improves quality and productivity, and prevents damage to machine...
Ming Ge, Yangsheng Xu, Ruxu Du