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DAC
1997
ACM
15 years 8 months ago
Data Memory Minimisation for Synchronous Data Flow Graphs Emulated on DSP-FPGA Targets
The paper presents an algorithm to determine the close-tosmallest possible data buffer sizes for arbitrary synchronous data flow (SDF) applications, such that we can guarantee the...
Marleen Adé, Rudy Lauwereins, J. A. Peperst...
155
Voted
FPGA
2004
ACM
158views FPGA» more  FPGA 2004»
15 years 9 months ago
A novel coarse-grain reconfigurable data-path for accelerating DSP kernels
In this paper, an efficient implementation of a high performance coarse-grain reconfigurable data-path on a mixed-granularity reconfigurable platform is presented. It consists of ...
Michalis D. Galanis, George Theodoridis, Spyros Tr...
137
Voted
BMCBI
2005
87views more  BMCBI 2005»
15 years 3 months ago
Efficient decoding algorithms for generalized hidden Markov model gene finders
Background: The Generalized Hidden Markov Model (GHMM) has proven a useful framework for the task of computational gene prediction in eukaryotic genomes, due to its flexibility an...
William H. Majoros, Mihaela Pertea, Arthur L. Delc...
DAC
2004
ACM
16 years 4 months ago
System design for DSP applications in transaction level modeling paradigm
In this paper, we systematically define three transaction level TLMs), which reside at different levels of abstraction between the functional and the implementation model of a DSP...
Abhijit K. Deb, Axel Jantsch, Johnny Öberg
134
Voted
GECCO
2009
Springer
156views Optimization» more  GECCO 2009»
15 years 10 months ago
Characterizing the genetic programming environment for fifth (GPE5) on a high performance computing cluster
Solving complex, real-world problems with genetic programming (GP) can require extensive computing resources. However, the highly parallel nature of GP facilitates using a large n...
Kenneth Holladay