690 search results - page 84 / 138 » Automated Architectural Exploration for Signal Processing Al... |
155
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DATE
2002
IEEE
15 years 8 months ago
2002
IEEE
We present an area and delay estimator in the context of a compiler that takes in high level signal and image processing applications described in MATLAB and performs automatic de...
116
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DAC
2009
ACM
16 years 4 months ago
2009
ACM
Don't-care conditions provide additional flexibility in logic synthesis and optimization. However, most work only focuses on the gate level because it is difficult to handle ...
131
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DAC
2007
ACM
16 years 4 months ago
2007
ACM
Due to high levels of integration and complexity, the design of multi-core SoCs has become increasingly challenging. In particular, energy consumption and distributing a single gl...
126
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ICS
2009
Tsinghua U.
15 years 10 months ago
2009
Tsinghua U.
Iterative stencil loops (ISLs) are used in many applications and tiling is a well-known technique to localize their computation. When ISLs are tiled across a parallel architecture...
146
Voted
ISSADS
2005
Springer
15 years 9 months ago
2005
Springer
Workflow is the key technology for business process automation, while distributed workflow is the solution to deal with the decentralized nature of workflow applications and the pe...