65 search results - page 9 / 13 » Automated Bus Generation for Multiprocessor SoC Design |
62
Voted
ISSS
2002
IEEE
15 years 2 months ago
2002
IEEE
In this paper, we introduce a Round–robin Arbiter Generator (RAG) tool. The RAG tool can generate a design for a Bus Arbiter (BA). The BA is able to handle the exact number of b...
77
Voted
CODES
2006
IEEE
15 years 3 months ago
2006
IEEE
For modern embedded systems, the complexity of embedded applications has reached a point where the performance requirements of these applications can no longer be supported by emb...
ISVLSI
2007
IEEE
15 years 3 months ago
2007
IEEE
Contemporary SoC design involves the proper selection of cores from a reference platform. Such selection implies the design exploration of alternative CPUs, which requires the gen...
DAC
2006
ACM
15 years 10 months ago
2006
ACM
Multimedia SoCs are characterized by a main controller that directs the activity of several cores, each of which is in charge of a stage in the processing of a media stream. The v...
DAC
2008
ACM
15 years 10 months ago
2008
ACM
In this paper we present a reconfigurable routing algorithm for a 2D-Mesh Network-on-Chip (NoC) dedicated to faulttolerant, Massively Parallel Multi-Processors Systems on Chip (MP...