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IPPS
1997
IEEE
15 years 7 months ago
Design and Implementation of Virtual Memory-Mapped Communication on Myrinet
This paper describes the design and implementation of the virtual memory-mapped communicationmodel (VMMC) on a Myrinet network of PCI-based PCs. VMMC has been designed and impleme...
Cezary Dubnicki, Angelos Bilas, Kai Li
HPCA
1996
IEEE
15 years 7 months ago
Register File Design Considerations in Dynamically Scheduled Processors
We have investigated the register file requirements of dynamically scheduled processors using register renaming and dispatch queues running the SPEC92 benchmarks. We looked at pro...
Keith I. Farkas, Norman P. Jouppi, Paul Chow
HPCA
1996
IEEE
15 years 7 months ago
Protected, User-Level DMA for the SHRIMP Network Interface
Traditional DMA requires the operating system to perform many tasks to initiate a transfer, with overhead on the order of hundreds or thousands of CPU instructions. This paper des...
Matthias A. Blumrich, Cezary Dubnicki, Edward W. F...
HPCA
1996
IEEE
15 years 7 months ago
Fault-Tolerance with Multimodule Routers
The current multiprocessors such asCray T3D support interprocessor communication using partitioned dimension-order routers (PDRs). In a PDR implementation, the routing logic and sw...
Suresh Chalasani, Rajendra V. Boppana
HPDC
1996
IEEE
15 years 7 months ago
Controlling QoS in a Collaborative Multimedia Environment
A collaborative multimedia environment allows users to work remotely on common projects by sharing applications (e.g., CAD tools, text editors, white boards) and simultaneously co...
Marco Alfano, Rolf Sigle