1569 search results - page 140 / 314 » Automated Design Improvement by Example |
130
Voted
DAC
2006
ACM
16 years 4 months ago
2006
ACM
Since performance on FPGAs is dominated by the routing architecture rather than wirelength, we propose a new architecture-aware approach to initial FPGA placement that models the ...
132
Voted
PVLDB
2010
15 years 2 months ago
2010
In this paper, we describe a main memory hybrid database system called HYRISE, which automatically partitions tables into vertical partitions of varying widths depending on how th...
121
Voted
ISQED
2006
IEEE
15 years 9 months ago
2006
IEEE
Design for Manufacturability (DFM) is becoming increasingly important as process geometries shrink. Conventional design rule pass/fail is not adequate to quantify DFM compliance. ...
137
Voted
DAC
2003
ACM
16 years 4 months ago
2003
ACM
Multiple clock cycles are needed to cross the global interconnects for multi-gigahertz designs in nanometer technologies. For synchronous designs, this requires retiming and pipel...
116
Voted
DAC
2003
ACM
16 years 4 months ago
2003
ACM
Bounded Model Checking (BMC) based on Boolean Satisfiability (SAT) procedures has recently gained popularity as an alternative to BDD-based model checking techniques for finding b...